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Description: Canonical Signed Digit Study (CSD)
NASA
October 2006
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Size: 1201152 |
Author: Oleg |
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Description: 数字信号处理FPGA实现 实用程序和文件,有sine.exe ---输入宽度。输出对应的正弦波表 mif文件
csd.exe --- 寻找整数和分数的标准有符号数字量（canonical signed digit ，CSD）表达式程序
fpinv.exe --- 倒数计算浮点数表的程序
dagen.exe ---分布式算法文件生成HDL" onclick="tagshow(event)" class="t_tag">VHDL代码的程序
cic.exe ---CIC滤波器计算参数的程序
-Digital Signal Processing FPGA realization of practical procedures and documents, there are sine.exe--- input width. Sine wave output of the corresponding csd.exe--- Table mif file to find the integer and fractional number of the volume of standard symbols (canonical signed digit, CSD) Expression Programming fpinv.exe--- countdown procedures for calculation of floating-point form dagen.exe--- documents distributed algorithm to generate HDL " onclick =" tagshow (event) " class =" t_tag " > VHDL program code cic.exe--- CIC filter process parameters
Platform: |
Size: 260096 |
Author: kevin |
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Description: This a VHDL library which performs signed digit operations in VHDL.-This is a VHDL library which performs signed digit operations in VHDL.
Platform: |
Size: 44032 |
Author: vonsquidy |
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Description: The signed digit (SD) system differs the traditional binary systems
presented in the previous section in the fact that it is ternary valued (i.e.,
digits have the value {0, 1,− 1}, where − 1 is sometimes denoted as 1).
SD numbers have proven to be useful in carry-free adders or multipliers
with less complexity, because the effort in multiplication can typically be-The signed digit (SD) system differs the traditional binary systems
presented in the previous section in the fact that it is ternary valued (i.e.,
digits have the value {0, 1,− 1}, where − 1 is sometimes denoted as 1).
SD numbers have proven to be useful in carry-free adders or multipliers
with less complexity, because the effort in multiplication can typically be
Platform: |
Size: 1024 |
Author: ehsan |
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